diff --git a/arch/arm/dts/uniphier-common32.dtsi b/arch/arm/dts/uniphier-common32.dtsi
index b0b2b57..e441033 100644
--- a/arch/arm/dts/uniphier-common32.dtsi
+++ b/arch/arm/dts/uniphier-common32.dtsi
@@ -31,7 +31,7 @@
 			interrupts = <0 33 4>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart0>;
-			clocks = <&uart_clk>;
+			clocks = <&peri_clk 0>;
 		};
 
 		serial1: serial@54006900 {
@@ -41,7 +41,7 @@
 			interrupts = <0 35 4>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart1>;
-			clocks = <&uart_clk>;
+			clocks = <&peri_clk 1>;
 		};
 
 		serial2: serial@54006a00 {
@@ -51,7 +51,7 @@
 			interrupts = <0 37 4>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart2>;
-			clocks = <&uart_clk>;
+			clocks = <&peri_clk 2>;
 		};
 
 		serial3: serial@54006b00 {
@@ -61,7 +61,7 @@
 			interrupts = <0 177 4>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart3>;
-			clocks = <&uart_clk>;
+			clocks = <&peri_clk 3>;
 		};
 
 		system_bus: system-bus@58c00000 {
@@ -79,16 +79,33 @@
 			reg = <0x59801000 0x400>;
 		};
 
-		mio: mioctrl@59810000 {
-			/* specify compatible in each SoC DTSI */
+		mioctrl@59810000 {
+			compatible = "socionext,uniphier-mioctrl",
+				     "simple-mfd", "syscon";
 			reg = <0x59810000 0x800>;
-			#clock-cells = <1>;
+			u-boot,dm-pre-reloc;
+
+			mio_clk: clock {
+				#clock-cells = <1>;
+			};
+
+			mio_rst: reset {
+				#reset-cells = <1>;
+			};
 		};
 
-		peri: perictrl@59820000 {
-			/* specify compatible in each SoC DTSI */
+		perictrl@59820000 {
+			compatible = "socionext,uniphier-perictrl",
+				     "simple-mfd", "syscon";
 			reg = <0x59820000 0x200>;
-			#clock-cells = <1>;
+
+			peri_clk: clock {
+				#clock-cells = <1>;
+			};
+
+			peri_rst: reset {
+				#reset-cells = <1>;
+			};
 		};
 
 		timer@60000200 {
@@ -114,7 +131,8 @@
 		};
 
 		soc-glue@5f800000 {
-			compatible = "simple-mfd", "syscon";
+			compatible = "socionext,uniphier-soc-glue",
+				     "simple-mfd", "syscon";
 			reg = <0x5f800000 0x2000>;
 			u-boot,dm-pre-reloc;
 
@@ -124,12 +142,18 @@
 			};
 		};
 
-		sysctrl: sysctrl@61840000 {
-			/* specify compatible in each SoC DTSI */
+		sysctrl@61840000 {
+			compatible = "socionext,uniphier-sysctrl",
+				     "simple-mfd", "syscon";
 			reg = <0x61840000 0x4000>;
-			#clock-cells = <1>;
-			clock-names = "ref";
-			clocks = <&refclk>;
+
+			sys_clk: clock {
+				#clock-cells = <1>;
+			};
+
+			sys_rst: reset {
+				#reset-cells = <1>;
+			};
 		};
 
 		nand: nand@68000000 {
diff --git a/arch/arm/dts/uniphier-ph1-ld11.dtsi b/arch/arm/dts/uniphier-ph1-ld11.dtsi
index ffe04f5..0bdbbdd 100644
--- a/arch/arm/dts/uniphier-ph1-ld11.dtsi
+++ b/arch/arm/dts/uniphier-ph1-ld11.dtsi
@@ -54,12 +54,6 @@
 			clock-frequency = <25000000>;
 		};
 
-		uart_clk: uart_clk {
-			#clock-cells = <0>;
-			compatible = "fixed-clock";
-			clock-frequency = <58820000>;
-		};
-
 		i2c_clk: i2c_clk {
 			#clock-cells = <0>;
 			compatible = "fixed-clock";
@@ -69,10 +63,10 @@
 
 	timer {
 		compatible = "arm,armv8-timer";
-		interrupts = <1 13 0xf01>,
-			     <1 14 0xf01>,
-			     <1 11 0xf01>,
-			     <1 10 0xf01>;
+		interrupts = <1 13 4>,
+			     <1 14 4>,
+			     <1 11 4>,
+			     <1 10 4>;
 	};
 
 	soc {
@@ -89,7 +83,7 @@
 			interrupts = <0 33 4>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart0>;
-			clocks = <&uart_clk>;
+			clocks = <&peri_clk 0>;
 			clock-frequency = <58820000>;
 		};
 
@@ -100,7 +94,7 @@
 			interrupts = <0 35 4>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart1>;
-			clocks = <&uart_clk>;
+			clocks = <&peri_clk 1>;
 			clock-frequency = <58820000>;
 		};
 
@@ -111,7 +105,7 @@
 			interrupts = <0 37 4>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart2>;
-			clocks = <&uart_clk>;
+			clocks = <&peri_clk 2>;
 			clock-frequency = <58820000>;
 		};
 
@@ -122,7 +116,7 @@
 			interrupts = <0 177 4>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart3>;
-			clocks = <&uart_clk>;
+			clocks = <&peri_clk 3>;
 			clock-frequency = <58820000>;
 		};
 
@@ -213,6 +207,22 @@
 			reg = <0x59801000 0x400>;
 		};
 
+		perictrl@59820000 {
+			compatible = "socionext,uniphier-perictrl",
+				     "simple-mfd", "syscon";
+			reg = <0x59820000 0x200>;
+
+			peri_clk: clock {
+				compatible = "socionext,uniphier-ld11-peri-clock";
+				#clock-cells = <1>;
+			};
+
+			peri_rst: reset {
+				compatible = "socionext,uniphier-ld11-peri-reset";
+				#reset-cells = <1>;
+			};
+		};
+
 		usb0: usb@5a800100 {
 			compatible = "socionext,uniphier-ehci", "generic-ehci";
 			status = "disabled";
@@ -220,7 +230,7 @@
 			interrupts = <0 243 4>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_usb0>;
-			clocks = <&mio 3>, <&mio 6>;
+			clocks = <&mio_clk 3>, <&mio_clk 6>;
 		};
 
 		usb1: usb@5a810100 {
@@ -230,7 +240,7 @@
 			interrupts = <0 244 4>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_usb1>;
-			clocks = <&mio 4>, <&mio 6>;
+			clocks = <&mio_clk 4>, <&mio_clk 6>;
 		};
 
 		usb2: usb@5a820100 {
@@ -240,17 +250,29 @@
 			interrupts = <0 245 4>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_usb2>;
-			clocks = <&mio 5>, <&mio 6>;
+			clocks = <&mio_clk 5>, <&mio_clk 6>;
 		};
 
-		mio: mioctrl@5b3e0000 {
-			compatible = "socionext,ph1-ld11-mioctrl";
+		mioctrl@5b3e0000 {
+			compatible = "socionext,uniphier-mioctrl",
+				     "simple-mfd", "syscon";
 			reg = <0x5b3e0000 0x800>;
-			#clock-cells = <1>;
+
+			mio_clk: clock {
+				compatible = "socionext,uniphier-ld11-mio-clock";
+				#clock-cells = <1>;
+			};
+
+			mio_rst: reset {
+				compatible = "socionext,uniphier-ld11-mio-reset";
+				#reset-cells = <1>;
+				resets = <&sys_rst 7>;
+			};
 		};
 
 		soc-glue@5f800000 {
-			compatible = "simple-mfd", "syscon";
+			compatible = "socionext,uniphier-soc-glue",
+				     "simple-mfd", "syscon";
 			reg = <0x5f800000 0x2000>;
 			u-boot,dm-pre-reloc;
 
@@ -273,6 +295,22 @@
 			#interrupt-cells = <3>;
 			interrupts = <1 9 4>;
 		};
+
+		sysctrl@61840000 {
+			compatible = "socionext,uniphier-ld11-sysctrl",
+				     "simple-mfd", "syscon";
+			reg = <0x61840000 0x4000>;
+
+			sys_clk: clock {
+				compatible = "socionext,uniphier-ld11-clock";
+				#clock-cells = <1>;
+			};
+
+			sys_rst: reset {
+				compatible = "socionext,uniphier-ld11-reset";
+				#reset-cells = <1>;
+			};
+		};
 	};
 };
 
diff --git a/arch/arm/dts/uniphier-ph1-ld20.dtsi b/arch/arm/dts/uniphier-ph1-ld20.dtsi
index 7497539..7f97f88 100644
--- a/arch/arm/dts/uniphier-ph1-ld20.dtsi
+++ b/arch/arm/dts/uniphier-ph1-ld20.dtsi
@@ -78,12 +78,6 @@
 			clock-frequency = <25000000>;
 		};
 
-		uart_clk: uart_clk {
-			#clock-cells = <0>;
-			compatible = "fixed-clock";
-			clock-frequency = <58820000>;
-		};
-
 		i2c_clk: i2c_clk {
 			#clock-cells = <0>;
 			compatible = "fixed-clock";
@@ -93,10 +87,10 @@
 
 	timer {
 		compatible = "arm,armv8-timer";
-		interrupts = <1 13 0xf01>,
-			     <1 14 0xf01>,
-			     <1 11 0xf01>,
-			     <1 10 0xf01>;
+		interrupts = <1 13 4>,
+			     <1 14 4>,
+			     <1 11 4>,
+			     <1 10 4>;
 	};
 
 	soc {
@@ -113,7 +107,7 @@
 			interrupts = <0 33 4>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart0>;
-			clocks = <&uart_clk>;
+			clocks = <&peri_clk 0>;
 			clock-frequency = <58820000>;
 		};
 
@@ -124,7 +118,7 @@
 			interrupts = <0 35 4>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart1>;
-			clocks = <&uart_clk>;
+			clocks = <&peri_clk 1>;
 			clock-frequency = <58820000>;
 		};
 
@@ -135,7 +129,7 @@
 			interrupts = <0 37 4>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart2>;
-			clocks = <&uart_clk>;
+			clocks = <&peri_clk 2>;
 			clock-frequency = <58820000>;
 		};
 
@@ -146,7 +140,7 @@
 			interrupts = <0 177 4>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart3>;
-			clocks = <&uart_clk>;
+			clocks = <&peri_clk 3>;
 			clock-frequency = <58820000>;
 		};
 
@@ -237,10 +231,36 @@
 			reg = <0x59801000 0x400>;
 		};
 
-		mio: mioctrl@59810000 {
-			compatible = "socionext,ph1-ld20-mioctrl";
+		mioctrl@59810000 {
+			compatible = "socionext,uniphier-mioctrl",
+				     "simple-mfd", "syscon";
 			reg = <0x59810000 0x800>;
-			#clock-cells = <1>;
+
+			mio_clk: clock {
+				compatible = "socionext,uniphier-ld20-mio-clock";
+				#clock-cells = <1>;
+			};
+
+			mio_rst: reset {
+				compatible = "socionext,uniphier-ld20-mio-reset";
+				#reset-cells = <1>;
+			};
+		};
+
+		perictrl@59820000 {
+			compatible = "socionext,uniphier-perictrl",
+				     "simple-mfd", "syscon";
+			reg = <0x59820000 0x200>;
+
+			peri_clk: clock {
+				compatible = "socionext,uniphier-ld20-peri-clock";
+				#clock-cells = <1>;
+			};
+
+			peri_rst: reset {
+				compatible = "socionext,uniphier-ld20-peri-reset";
+				#reset-cells = <1>;
+			};
 		};
 
 		sd: sdhc@5a400000 {
@@ -250,12 +270,13 @@
 			interrupts = <0 76 4>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_sd>;
-			clocks = <&mio 0>;
+			clocks = <&mio_clk 0>;
 			bus-width = <4>;
 		};
 
 		soc-glue@5f800000 {
-			compatible = "simple-mfd", "syscon";
+			compatible = "socionext,uniphier-soc-glue",
+				     "simple-mfd", "syscon";
 			reg = <0x5f800000 0x2000>;
 			u-boot,dm-pre-reloc;
 
@@ -278,6 +299,22 @@
 			#interrupt-cells = <3>;
 			interrupts = <1 9 4>;
 		};
+
+		sysctrl@61840000 {
+			compatible = "socionext,uniphier-sysctrl",
+				     "simple-mfd", "syscon";
+			reg = <0x61840000 0x4000>;
+
+			sys_clk: clock {
+				compatible = "socionext,uniphier-ld20-clock";
+				#clock-cells = <1>;
+			};
+
+			sys_rst: reset {
+				compatible = "socionext,uniphier-ld20-reset";
+				#reset-cells = <1>;
+			};
+		};
 	};
 };
 
diff --git a/arch/arm/dts/uniphier-ph1-ld4.dtsi b/arch/arm/dts/uniphier-ph1-ld4.dtsi
index 07f315a..e4884b9 100644
--- a/arch/arm/dts/uniphier-ph1-ld4.dtsi
+++ b/arch/arm/dts/uniphier-ph1-ld4.dtsi
@@ -30,12 +30,6 @@
 			clock-frequency = <50000000>;
 		};
 
-		uart_clk: uart_clk {
-			#clock-cells = <0>;
-			compatible = "fixed-clock";
-			clock-frequency = <36864000>;
-		};
-
 		iobus_clk: iobus_clk {
 			#clock-cells = <0>;
 			compatible = "fixed-clock";
@@ -228,7 +222,7 @@
 		pinctrl-names = "default", "1.8v";
 		pinctrl-0 = <&pinctrl_sd>;
 		pinctrl-1 = <&pinctrl_sd_1v8>;
-		clocks = <&mio 0>;
+		clocks = <&mio_clk 0>;
 		bus-width = <4>;
 	};
 
@@ -240,7 +234,7 @@
 		pinctrl-names = "default", "1.8v";
 		pinctrl-0 = <&pinctrl_emmc>;
 		pinctrl-1 = <&pinctrl_emmc_1v8>;
-		clocks = <&mio 1>;
+		clocks = <&mio_clk 1>;
 		bus-width = <8>;
 		non-removable;
 	};
@@ -252,7 +246,7 @@
 		interrupts = <0 80 4>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_usb0>;
-		clocks = <&mio 3>, <&mio 6>;
+		clocks = <&mio_clk 3>, <&mio_clk 6>;
 	};
 
 	usb1: usb@5a810100 {
@@ -262,7 +256,7 @@
 		interrupts = <0 81 4>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_usb1>;
-		clocks = <&mio 4>, <&mio 6>;
+		clocks = <&mio_clk 4>, <&mio_clk 6>;
 	};
 
 	usb2: usb@5a820100 {
@@ -272,7 +266,7 @@
 		interrupts = <0 82 4>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_usb2>;
-		clocks = <&mio 5>, <&mio 6>;
+		clocks = <&mio_clk 5>, <&mio_clk 6>;
 	};
 
 	aidet@61830000 {
@@ -302,22 +296,30 @@
 	clock-frequency = <36864000>;
 };
 
-&mio {
-	compatible = "socionext,ph1-ld4-mioctrl";
-	clock-names = "stdmac", "ehci";
-	clocks = <&sysctrl 10>, <&sysctrl 18>;
+&mio_clk {
+	compatible = "socionext,uniphier-ld4-mio-clock";
 };
 
-&peri {
-	compatible = "socionext,ph1-ld4-perictrl";
-	clock-names = "uart", "i2c";
-	clocks = <&sysctrl 3>, <&sysctrl 4>;
+&mio_rst {
+	compatible = "socionext,uniphier-ld4-mio-reset";
+};
+
+&peri_clk {
+	compatible = "socionext,uniphier-ld4-peri-clock";
+};
+
+&peri_rst {
+	compatible = "socionext,uniphier-ld4-peri-reset";
 };
 
 &pinctrl {
 	compatible = "socionext,uniphier-ld4-pinctrl";
 };
 
-&sysctrl {
-	compatible = "socionext,ph1-ld4-sysctrl";
+&sys_clk {
+	compatible = "socionext,uniphier-ld4-clock";
+};
+
+&sys_rst {
+	compatible = "socionext,uniphier-ld4-reset";
 };
diff --git a/arch/arm/dts/uniphier-ph1-pro4-sanji.dts b/arch/arm/dts/uniphier-ph1-pro4-sanji.dts
index 965fe08..3f178d2 100644
--- a/arch/arm/dts/uniphier-ph1-pro4-sanji.dts
+++ b/arch/arm/dts/uniphier-ph1-pro4-sanji.dts
@@ -89,7 +89,7 @@
 	u-boot,dm-pre-reloc;
 };
 
-&mio {
+&mio_clk {
 	u-boot,dm-pre-reloc;
 };
 
diff --git a/arch/arm/dts/uniphier-ph1-pro4.dtsi b/arch/arm/dts/uniphier-ph1-pro4.dtsi
index e0b28b8..192ce84 100644
--- a/arch/arm/dts/uniphier-ph1-pro4.dtsi
+++ b/arch/arm/dts/uniphier-ph1-pro4.dtsi
@@ -351,7 +351,7 @@
 		pinctrl-names = "default", "1.8v";
 		pinctrl-0 = <&pinctrl_sd>;
 		pinctrl-1 = <&pinctrl_sd_1v8>;
-		clocks = <&mio 0>;
+		clocks = <&mio_clk 0>;
 		bus-width = <4>;
 	};
 
@@ -363,7 +363,7 @@
 		pinctrl-names = "default", "1.8v";
 		pinctrl-0 = <&pinctrl_emmc>;
 		pinctrl-1 = <&pinctrl_emmc_1v8>;
-		clocks = <&mio 1>;
+		clocks = <&mio_clk 1>;
 		bus-width = <8>;
 		non-removable;
 	};
@@ -376,7 +376,7 @@
 		pinctrl-names = "default", "1.8v";
 		pinctrl-0 = <&pinctrl_sd1>;
 		pinctrl-1 = <&pinctrl_sd1_1v8>;
-		clocks = <&mio 2>;
+		clocks = <&mio_clk 2>;
 		bus-width = <4>;
 	};
 
@@ -387,7 +387,7 @@
 		interrupts = <0 80 4>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_usb2>;
-		clocks = <&mio 3>, <&mio 6>;
+		clocks = <&mio_clk 3>, <&mio_clk 6>;
 	};
 
 	usb3: usb@5a810100 {
@@ -397,7 +397,7 @@
 		interrupts = <0 81 4>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_usb3>;
-		clocks = <&mio 4>, <&mio 6>;
+		clocks = <&mio_clk 4>, <&mio_clk 6>;
 	};
 
 	aidet@5fc20000 {
@@ -444,22 +444,30 @@
 	clock-frequency = <73728000>;
 };
 
-&mio {
-	compatible = "socionext,ph1-pro4-mioctrl";
-	clock-names = "stdmac", "ehci";
-	clocks = <&sysctrl 10>, <&sysctrl 18>;
+&mio_clk {
+	compatible = "socionext,uniphier-pro4-mio-clock";
 };
 
-&peri {
-	compatible = "socionext,ph1-pro4-perictrl";
-	clock-names = "uart", "fi2c";
-	clocks = <&sysctrl 3>, <&sysctrl 4>;
+&mio_rst {
+	compatible = "socionext,uniphier-pro4-mio-reset";
+};
+
+&peri_clk {
+	compatible = "socionext,uniphier-pro4-peri-clock";
+};
+
+&peri_rst {
+	compatible = "socionext,uniphier-pro4-peri-reset";
 };
 
 &pinctrl {
 	compatible = "socionext,uniphier-pro4-pinctrl";
 };
 
-&sysctrl {
-	compatible = "socionext,ph1-pro4-sysctrl";
+&sys_clk {
+	compatible = "socionext,uniphier-pro4-clock";
+};
+
+&sys_rst {
+	compatible = "socionext,uniphier-pro4-reset";
 };
diff --git a/arch/arm/dts/uniphier-ph1-pro5.dtsi b/arch/arm/dts/uniphier-ph1-pro5.dtsi
index 05f961f..22a70b1 100644
--- a/arch/arm/dts/uniphier-ph1-pro5.dtsi
+++ b/arch/arm/dts/uniphier-ph1-pro5.dtsi
@@ -38,12 +38,6 @@
 			clock-frequency = <50000000>;
 		};
 
-		uart_clk: uart_clk {
-			#clock-cells = <0>;
-			compatible = "fixed-clock";
-			clock-frequency = <73728000>;
-		};
-
 		i2c_clk: i2c_clk {
 			#clock-cells = <0>;
 			compatible = "fixed-clock";
@@ -367,7 +361,7 @@
 		interrupts = <0 78 4>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_emmc>;
-		clocks = <&mio 1>;
+		clocks = <&mio_clk 1>;
 		bus-width = <8>;
 		non-removable;
 	};
@@ -380,7 +374,7 @@
 		pinctrl-names = "default", "1.8v";
 		pinctrl-0 = <&pinctrl_sd>;
 		pinctrl-1 = <&pinctrl_sd_1v8>;
-		clocks = <&mio 0>;
+		clocks = <&mio_clk 0>;
 		bus-width = <4>;
 	};
 
@@ -423,22 +417,30 @@
 	clock-frequency = <73728000>;
 };
 
-&mio {
-	compatible = "socionext,ph1-pro5-mioctrl";
-	clock-names = "stdmac";
-	clocks = <&sysctrl 10>;
+&mio_clk {
+	compatible = "socionext,uniphier-pro5-mio-clock";
 };
 
-&peri {
-	compatible = "socionext,ph1-pro5-perictrl";
-	clock-names = "uart", "fi2c";
-	clocks = <&sysctrl 3>, <&sysctrl 4>;
+&mio_rst {
+	compatible = "socionext,uniphier-pro5-mio-reset";
+};
+
+&peri_clk {
+	compatible = "socionext,uniphier-pro5-peri-clock";
+};
+
+&peri_rst {
+	compatible = "socionext,uniphier-pro5-peri-reset";
 };
 
 &pinctrl {
 	compatible = "socionext,uniphier-pro5-pinctrl";
 };
 
-&sysctrl {
-	compatible = "socionext,ph1-pro5-sysctrl";
+&sys_clk {
+	compatible = "socionext,uniphier-pro5-clock";
+};
+
+&sys_rst {
+	compatible = "socionext,uniphier-pro5-reset";
 };
diff --git a/arch/arm/dts/uniphier-ph1-sld3-ref.dts b/arch/arm/dts/uniphier-ph1-sld3-ref.dts
index f3e76b3..116e571 100644
--- a/arch/arm/dts/uniphier-ph1-sld3-ref.dts
+++ b/arch/arm/dts/uniphier-ph1-sld3-ref.dts
@@ -86,10 +86,6 @@
        u-boot,dm-pre-reloc;
 };
 
-&mio {
-       u-boot,dm-pre-reloc;
-};
-
 &emmc {
        u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/uniphier-ph1-sld3.dtsi b/arch/arm/dts/uniphier-ph1-sld3.dtsi
index d8c44b7..a554b08 100644
--- a/arch/arm/dts/uniphier-ph1-sld3.dtsi
+++ b/arch/arm/dts/uniphier-ph1-sld3.dtsi
@@ -42,12 +42,6 @@
 			clock-frequency = <50000000>;
 		};
 
-		uart_clk: uart_clk {
-			#clock-cells = <0>;
-			compatible = "fixed-clock";
-			clock-frequency = <36864000>;
-		};
-
 		iobus_clk: iobus_clk {
 			#clock-cells = <0>;
 			compatible = "fixed-clock";
@@ -92,7 +86,6 @@
 			interrupts = <0 33 4>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart0>;
-			clocks = <&uart_clk>;
 			clock-frequency = <36864000>;
 		};
 
@@ -103,7 +96,6 @@
 			interrupts = <0 35 4>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart1>;
-			clocks = <&uart_clk>;
 			clock-frequency = <36864000>;
 		};
 
@@ -114,7 +106,6 @@
 			interrupts = <0 37 4>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_uart2>;
-			clocks = <&uart_clk>;
 			clock-frequency = <36864000>;
 		};
 
@@ -299,12 +290,22 @@
 			reg = <0x59801000 0x400>;
 		};
 
-		mio: mioctrl@59810000 {
-			compatible = "socionext,ph1-sld3-mioctrl";
+		mioctrl@59810000 {
+			compatible = "socionext,uniphier-mioctrl",
+				     "simple-mfd", "syscon";
 			reg = <0x59810000 0x800>;
-			#clock-cells = <1>;
-			clock-names = "stdmac", "ehci";
-			clocks = <&sysctrl 10>, <&sysctrl 18>;
+			u-boot,dm-pre-reloc;
+
+			mio_clk: clock {
+				compatible = "socionext,uniphier-sld3-mio-clock";
+				#clock-cells = <1>;
+				u-boot,dm-pre-reloc;
+			};
+
+			mio_rst: reset {
+				compatible = "socionext,uniphier-sld3-mio-reset";
+				#reset-cells = <1>;
+			};
 		};
 
 		emmc: sdhc@5a400000 {
@@ -315,7 +316,7 @@
 			pinctrl-names = "default", "1.8v";
 			pinctrl-0 = <&pinctrl_emmc>;
 			pinctrl-1 = <&pinctrl_emmc_1v8>;
-			clocks = <&mio 1>;
+			clocks = <&mio_clk 1>;
 			bus-width = <8>;
 			non-removable;
 		};
@@ -328,7 +329,7 @@
 			pinctrl-names = "default", "1.8v";
 			pinctrl-0 = <&pinctrl_sd>;
 			pinctrl-1 = <&pinctrl_sd_1v8>;
-			clocks = <&mio 0>;
+			clocks = <&mio_clk 0>;
 			bus-width = <4>;
 		};
 
@@ -339,7 +340,7 @@
 			interrupts = <0 80 4>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_usb0>;
-			clocks = <&mio 3>, <&mio 6>;
+			clocks = <&mio_clk 3>, <&mio_clk 6>;
 		};
 
 		usb1: usb@5a810100 {
@@ -349,7 +350,7 @@
 			interrupts = <0 81 4>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_usb1>;
-			clocks = <&mio 4>, <&mio 6>;
+			clocks = <&mio_clk 4>, <&mio_clk 6>;
 		};
 
 		usb2: usb@5a820100 {
@@ -359,7 +360,7 @@
 			interrupts = <0 82 4>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_usb2>;
-			clocks = <&mio 5>, <&mio 6>;
+			clocks = <&mio_clk 5>, <&mio_clk 6>;
 		};
 
 		usb3: usb@5a830100 {
@@ -369,7 +370,7 @@
 			interrupts = <0 83 4>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_usb3>;
-			clocks = <&mio 7>, <&mio 6>;
+			clocks = <&mio_clk 7>, <&mio_clk 6>;
 		};
 
 		soc-glue@5f800000 {
@@ -388,12 +389,20 @@
 			reg = <0xf1830000 0x200>;
 		};
 
-		sysctrl: sysctrl@f1840000 {
-			compatible = "socionext,ph1-sld3-sysctrl";
+		sysctrl@f1840000 {
+			compatible = "socionext,uniphier-sysctrl",
+				     "simple-mfd", "syscon";
 			reg = <0xf1840000 0x4000>;
-			#clock-cells = <1>;
-			clock-names = "ref";
-			clocks = <&refclk>;
+
+			sys_clk: clock {
+				compatible = "socionext,uniphier-sld3-clock";
+				#clock-cells = <1>;
+			};
+
+			sys_rst: reset {
+				compatible = "socionext,uniphier-sld3-reset";
+				#reset-cells = <1>;
+			};
 		};
 
 		nand: nand@f8000000 {
diff --git a/arch/arm/dts/uniphier-ph1-sld8.dtsi b/arch/arm/dts/uniphier-ph1-sld8.dtsi
index e0376a1..1ecce50 100644
--- a/arch/arm/dts/uniphier-ph1-sld8.dtsi
+++ b/arch/arm/dts/uniphier-ph1-sld8.dtsi
@@ -30,12 +30,6 @@
 			clock-frequency = <50000000>;
 		};
 
-		uart_clk: uart_clk {
-			#clock-cells = <0>;
-			compatible = "fixed-clock";
-			clock-frequency = <80000000>;
-		};
-
 		iobus_clk: iobus_clk {
 			#clock-cells = <0>;
 			compatible = "fixed-clock";
@@ -228,7 +222,7 @@
 		pinctrl-names = "default", "1.8v";
 		pinctrl-0 = <&pinctrl_sd>;
 		pinctrl-1 = <&pinctrl_sd_1v8>;
-		clocks = <&mio 0>;
+		clocks = <&mio_clk 0>;
 		bus-width = <4>;
 	};
 
@@ -240,7 +234,7 @@
 		pinctrl-names = "default", "1.8v";
 		pinctrl-0 = <&pinctrl_emmc>;
 		pinctrl-1 = <&pinctrl_emmc_1v8>;
-		clocks = <&mio 1>;
+		clocks = <&mio_clk 1>;
 		bus-width = <8>;
 		non-removable;
 	};
@@ -252,7 +246,7 @@
 		interrupts = <0 80 4>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_usb0>;
-		clocks = <&mio 3>, <&mio 6>;
+		clocks = <&mio_clk 3>, <&mio_clk 6>;
 	};
 
 	usb1: usb@5a810100 {
@@ -262,7 +256,7 @@
 		interrupts = <0 81 4>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_usb1>;
-		clocks = <&mio 4>, <&mio 6>;
+		clocks = <&mio_clk 4>, <&mio_clk 6>;
 	};
 
 	usb2: usb@5a820100 {
@@ -272,7 +266,7 @@
 		interrupts = <0 82 4>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_usb2>;
-		clocks = <&mio 5>, <&mio 6>;
+		clocks = <&mio_clk 5>, <&mio_clk 6>;
 	};
 
 	aidet@61830000 {
@@ -302,22 +296,30 @@
 	clock-frequency = <80000000>;
 };
 
-&mio {
-	compatible = "socionext,ph1-sld8-mioctrl";
-	clock-names = "stdmac", "ehci";
-	clocks = <&sysctrl 10>, <&sysctrl 18>;
+&mio_clk {
+	compatible = "socionext,uniphier-sld8-mio-clock";
 };
 
-&peri {
-	compatible = "socionext,ph1-sld8-perictrl";
-	clock-names = "uart", "i2c";
-	clocks = <&sysctrl 3>, <&sysctrl 4>;
+&mio_rst {
+	compatible = "socionext,uniphier-sld8-mio-reset";
+};
+
+&peri_clk {
+	compatible = "socionext,uniphier-sld8-peri-clock";
+};
+
+&peri_rst {
+	compatible = "socionext,uniphier-sld8-peri-reset";
 };
 
 &pinctrl {
 	compatible = "socionext,uniphier-sld8-pinctrl";
 };
 
-&sysctrl {
-	compatible = "socionext,ph1-sld8-sysctrl";
+&sys_clk {
+	compatible = "socionext,uniphier-sld8-clock";
+};
+
+&sys_rst {
+	compatible = "socionext,uniphier-sld8-reset";
 };
diff --git a/arch/arm/dts/uniphier-proxstream2-gentil.dts b/arch/arm/dts/uniphier-proxstream2-gentil.dts
index 1175703..7233dc6 100644
--- a/arch/arm/dts/uniphier-proxstream2-gentil.dts
+++ b/arch/arm/dts/uniphier-proxstream2-gentil.dts
@@ -69,7 +69,7 @@
 	u-boot,dm-pre-reloc;
 };
 
-&mio {
+&mio_clk {
 	u-boot,dm-pre-reloc;
 };
 
diff --git a/arch/arm/dts/uniphier-proxstream2-vodka.dts b/arch/arm/dts/uniphier-proxstream2-vodka.dts
index 928a092..30ea270 100644
--- a/arch/arm/dts/uniphier-proxstream2-vodka.dts
+++ b/arch/arm/dts/uniphier-proxstream2-vodka.dts
@@ -54,7 +54,7 @@
 	u-boot,dm-pre-reloc;
 };
 
-&mio {
+&mio_clk {
 	u-boot,dm-pre-reloc;
 };
 
diff --git a/arch/arm/dts/uniphier-proxstream2.dtsi b/arch/arm/dts/uniphier-proxstream2.dtsi
index 23a6bfa..609cbaa 100644
--- a/arch/arm/dts/uniphier-proxstream2.dtsi
+++ b/arch/arm/dts/uniphier-proxstream2.dtsi
@@ -52,12 +52,6 @@
 			clock-frequency = <50000000>;
 		};
 
-		uart_clk: uart_clk {
-			#clock-cells = <0>;
-			compatible = "fixed-clock";
-			clock-frequency = <88900000>;
-		};
-
 		i2c_clk: i2c_clk {
 			#clock-cells = <0>;
 			compatible = "fixed-clock";
@@ -366,7 +360,7 @@
 		interrupts = <0 78 4>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_emmc>;
-		clocks = <&mio 1>;
+		clocks = <&mio_clk 1>;
 		bus-width = <8>;
 		non-removable;
 	};
@@ -379,7 +373,7 @@
 		pinctrl-names = "default", "1.8v";
 		pinctrl-0 = <&pinctrl_sd>;
 		pinctrl-1 = <&pinctrl_sd_1v8>;
-		clocks = <&mio 0>;
+		clocks = <&mio_clk 0>;
 		bus-width = <4>;
 	};
 
@@ -427,22 +421,30 @@
 	clock-frequency = <88900000>;
 };
 
-&mio {
-	compatible = "socionext,proxstream2-mioctrl";
-	clock-names = "stdmac";
-	clocks = <&sysctrl 10>;
+&mio_clk {
+	compatible = "socionext,uniphier-pxs2-mio-clock";
 };
 
-&peri {
-	compatible = "socionext,proxstream2-perictrl";
-	clock-names = "uart", "fi2c";
-	clocks = <&sysctrl 3>, <&sysctrl 4>;
+&mio_rst {
+	compatible = "socionext,uniphier-pxs2-mio-reset";
+};
+
+&peri_clk {
+	compatible = "socionext,uniphier-pxs2-peri-clock";
+};
+
+&peri_rst {
+	compatible = "socionext,uniphier-pxs2-peri-reset";
 };
 
 &pinctrl {
 	compatible = "socionext,uniphier-pxs2-pinctrl";
 };
 
-&sysctrl {
-	compatible = "socionext,proxstream2-sysctrl";
+&sys_clk {
+	compatible = "socionext,uniphier-pxs2-clock";
+};
+
+&sys_rst {
+	compatible = "socionext,uniphier-pxs2-reset";
 };